Question
Question: Write the names of logic gates related to figure P and table Q. , 0 (low) then the output will be zero (low).
If the inputs are 0 (low), 1 (high) then the output will be zero (low).
If the inputs are 1 (high), 0 (low) then the output will be zero (low).
If the inputs are 1 (high), 1 (high) then the output will be one (high).
The truth table of AND gate is as follows
In the above table, A, B are the inputs and Y is the output. Y’ is the complement of the output Y.
Table Q
The given table is the truth table of the logic gate ‘OR’. The below diagram is of OR gate.
In an OR gate, if one of the inputs is high then the output will be directly high.
If the inputs are 0 (low), 0 (low) then the output will be zero (low).
If the inputs are 0 (low), 1 (high) then the output will be one (high).
If the inputs are 1 (high), 0 (low) then the output will be one (high).
If the inputs are 1 (high), 1 (high) then the output will be one (high).
Note: In an AND gate, the output will be high only when all the given inputs are high whereas in an OR gate, if atleast one of the inputs is high then the output is high. So an AND gate is not an OR gate. Do not confuse an AND gate with an OR gate.